《计算机系统结构英文课件知识讲解》由会员分享，可在线阅读，更多相关《计算机系统结构英文课件知识讲解（36页珍藏版）》请在金锄头文库上搜索。
1、Chapter 2: Computer-System Structures,Computer System Operation I/O Structure Storage Structure Storage Hierarchy Hardware Protection General System Architecture,Uniprocessor Computer-System Architecture,controller,Controller,A device controller is a part of a computer system that makes sense of the
2、 signals going to, and coming from the CPU processor. Each device controller is in charge of a particular device type. Device controllers use binary and digital codes. Each device controller has a local buffer and a command register. I/O is from the device to local buffer of controller. I/O devices
3、and the CPU can execute concurrently. Device controllers communicate with the CPU by causing an interrupt.,Common Functions of Interrupts,Interrupts transfers control to the interrupt service routine generally, through the interrupt vector, which contains the addresses of all the service routines. 通
4、常中断通过中断向量把控制传给中断服务程序 Interrupt architecture must save the address of the interrupted instruction. Incoming interrupts are disabled while another interrupt is being processed to prevent a lost interrupt. A trap is a software-generated interrupt caused either by an error or a user request. An operatin
5、g system is interrupt driven.,Interrupt Handling,The operating system preserves the state of the CPU by storing registers and the program counter. Determines which type of interrupt has occurred: polling vectored interrupt system Separate segments of code determine what action should be taken for ea
6、ch type of interrupt,Interrupt Time Line For a Single Process Doing Output (P21),Chapter 2: Computer-System Structures,Computer System Operation I/O Structure Storage Structure Storage Hierarchy Hardware Protection General System Architecture,I/O Structure,1. No channel (IOP): polling,CPU-Oriented,I
7、/O Structure,2. channel (IOP):,Memory-Oriented,How to output the data in RAM ?,Construct a channel program Submit the channel program to the corresponding IOP via RAM The IOP executes the channel program The IOP notifies CPU by causing an interrupt upon completion,A channel program is a sequence of
8、I/O instructions executed by the input/output channel processor (IOP). The channel program consists of one or more channel command words.,Two I/O Methods,Synchronous,Asynchronous,Synchronous I/O,After I/O starts, control returns to user program only upon I/O completion. wait instruction idles the CP
9、U until the next interrupt wait loop (contention for memory access). At most one I/O request is outstanding at a time, no simultaneous I/O processing.,Asynchronous I/O,After I/O starts, control returns to user program, without waiting for I/O completion. System call request to the operating system t
10、o allow user to wait for I/O completion. Device-status table contains entry for each I/O device indicating its type, address, and state. Operating system indexes into I/O device table to determine device status and to modify table entry to include interrupt. The main advantage of asynchronous I/O is
11、 increased system efficiency.,Device-Status Table,I/O Structure,Programmed input/output (PIO) is a method of transferring data between the CPU and a peripheral. In general, programmed I/O happens when software running on the CPU uses instructions that access I/O address space to perform data transfe
12、rs to or from an I/O device. With Direct Memory Access (DMA) , the CPU would initiate the transfer, do other operations while the transfer is in progress, and receive an interrupt from the DMA controller once the operation has been done.,Direct Memory Access (DMA) Structure,Used for high-speed I/O d
13、evices able to transmit information at close to memory speeds. Device controller transfers blocks of data from buffer storage directly to main memory without CPU intervention. Only one interrupt is generated per block, rather than the one interrupt per byte.,Chapter 2: Computer-System Structures,Com
14、puter System Operation I/O Structure Storage Structure Storage Hierarchy Hardware Protection General System Architecture,Storage Structure,Main memory only large storage media that the CPU can access directly. Secondary storage extension of main memory that provides large nonvolatile storage capacit
15、y. Magnetic disks rigid metal or glass platters covered with magnetic recording material Disk surface is logically divided into tracks, which are subdivided into sectors. The disk controller determines the logical interaction between the device and the computer.,Moving-Head Disk Mechanism,Positionin
16、g time (random-access time) seek time rotational latency transfer time To decrease mechanical delays, i.e., the seek time and the rotational latency, Disk Scheduling Algorithm,Chapter 2: Computer-System Structures,Computer System Operation I/O Structure Storage Structure Storage Hierarchy Hardware Protection General System Architecture,Storage Hierarchy,Storage systems organized in hierarchy. Speed cost volatility Caching copying information into faster storage sys
