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1、山东建筑大学毕业设计外文文献及译文外文文献： Embedded Systems Design using the TI MSP430 Series（selection）This book is intended for the embedded engineer who is new to the field, and as an introduction and reference for those experienced with micro-controller development, but are new to the MSP430 family of devices. I ha
2、ve assumed that the reader has some experience with microcontroller-based design, either professionally or academically. As an example, the book de- scribes interrupt functionality in detail, but assumes that you, the reader, already know what an interrupt is and how to use it. It is also important
3、to note that, while much of the information in this book is identical to that which is available from the TI documentation, this book is intended to supplement, not replace that valuable source of information. The Users Guides and Application Notes together offer a depth and breadth of technical inf
4、ormation that would be difficult to replicate in a single source. The intent of this book is to highlight some of the most commonly used information, along with some helpful suggestions and rules of thumb.The MSP430 FamilyThe MSP430 family is a broad family of low power, feature rich 16-bit microcon
5、trollers from Texas Instruments. They share a common, RISC-type, Neumann CPU core. The 430 is competitive in price with the 8-bit controller market, and supports both 8 and 16-bit instructions, allowing migration from most similarly sized platforms.The family of devices ranges from the very small (1
6、k ROM, 128 bytes for RAM, sub-dollar) up to larger (60k ROM, 2k RAM, with prices in the $10 range) devices. Currently, there are at least 40 flavors available, with more being added regularly. The devices are split into three families: the MSP430x3xx, which is a basic unit, the MSP430x1xx, which is
7、a more feature-rich family, and the MSP430x4xx, which is similar to the 1xx, with a built in LCD driver. You will find these referred to as 1xx, 3xx, and 4xx devices throughout this book.Part Numbering ConventionPart numbers for MSP430 devices are determined based on their capabilities. All device p
8、art numbers follow the following template:MSP430Mt Fa F bMcM: Memory TypeC: ROMF: FlashP: OTPE: EPROM (for developmental use. There are few of these.)F a, F b: Family and Features10, 11: Basic12, 13: Hardware UART14: Hardware UART, Hardware Multiplier31, 32: LCD Controller33: LCD Controller, Hardwar
9、e UART, Hardware Multiplier41: LCD Controller43: LCD Controller, Hardware UART44: LCD Controller, Hardware UART, Hardware MultiplierMc: Memory Capacity0: 1kb ROM, 128b RAM1: 2kb ROM, 128b RAM2: 4kb ROM, 256b RAM3: 8kb ROM, 256b RAM4: 12kb ROM, 512b RAM5: 16kb ROM, 512b RAM6: 24kb ROM, 1kb RAM7: 32kb
10、 ROM, 1kb RAM8: 48kb ROM, 2kb RAM9: 60kb ROM, 2kb RAMExample: The MSP430F435 is a Flash memory device with an LCD controller, a hardware UART, 16 kb of code memory, and 512 bytes of RAM.The part numbering scheme described above is a bit fragmented. There are common features not consistently represen
11、ted (type of ADC, number of timers, etc), and there are some other inconsistencies (for example, the 33 family has the multiplier, but the 13 and 43s do not). I would recommend against selecting parts based on their numbering scheme. Rather, once you have a vague idea of your requirements, go to the
12、 TI website (www.TI.com), and use their parametric sort feature.Architecture: CPU and MemoryAs discussed in chapter 1, the MSP430 utilizes a 16-bit RISC architecture, which is capable of processing instructions on either bytes or words. The CPU is identical for all members of the 430 family. It cons
13、ists of a 3-stage instruction pipeline, instruction decoding, a 16-bit ALU, four dedicated-use registers, and twelve working (or scratchpad) registers. The CPU is connected to its memory through two 16-bit busses, one for addressing, and the other for data. All memory, including RAM, ROM, informatio
14、n memory, special function registers, and peripheral registers are mapped into a single, contiguous address space.This architecture is unique for several reasons. First, the designers at Texas Instruments have left an awful lot of space for future development. Almost half the Status Register remains
15、 available for future growth, roughly half of the peripheral register space is unused, and only six of the sixteen available special function registers are implemented.Second, there are plenty of working registers. After years of having one or two working registers, I greatly enjoyed my first experi
16、ence with the twelve 16-bit CPU scratchpads. The programming style is slightly different, and can be much more efficient, especially in the hands of a programmer who knows how to use this feature to its fullest.Third, this architecture is deceptively straightforward. It is very flexible, and the addressing modes are more complicated than most other small proces
