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1、1 1 2 2 3 3 4 4 5 5 6 6 DD CC BB AA Title SizeDocument NumberRev Date Sheetof TOP LEVEL1 2 A 317 DDR CLK p DDR CKE DDR BA0 DDR BA1 DDR WE n DDR CAS n DDR RAS n DDR CS n DDR DQ 0 15 DDR DM0 DDR DM1 CIII TDI TMS TCK CONF nCE CONF DONE nSTATUS DDR A 0 12 CIII TDO DDR CLK n DDR DQS0 DDR DQS1 SRAM WE n S
2、RAM CE1 n SRAM OE n SRAM BE n 0 1 SRAM CLK FLASH SRAM DQ 0 15 FLASH SRAM A 0 25 FLASH CLK FLASH ADV n FLASH CE n FLASH OE n FLASH RESET n FLASH WE n FLASH CE n HSMC CLKIN p 1 2 HSMC CLKIN n 1 2 HSMC TX p 4 16 HSMC TX n 4 16 HSMC CLKOUT p 1 2 HSMC CLKOUT n 1 2 HSMC CLKOUT0 LED 0 3 HSMC RX p 4 16 HSMC
3、 RX n 4 16 HSMC D 0 34 50MHZ SRAM WE n SRAM CE1 n SRAM CLK DDR DQ 0 15 DDR DQS1 DDR CLK p DDR CKE DDR BA0 DDR BA1 DDR WE n DDR CAS n DDR RAS n DDR CS n DDR DM0 DDR DM1 DDR A 0 12 DDR CLK n DDR DQS0 HSMC RX n 4 16 HSMC RX p 4 16 HSMC D 0 34 HSMC CLKOUT p 1 2 HSMC CLKOUT n 1 2 FLASH CLK FLASH ADV n FL
4、ASH CE n FLASH OE n FLASH RESET n FLASH WE n HSMC TX p 4 16 HSMC TX n 4 16 50MHZ TMS TCK nCONFIG CIII TDI CONF DONE nSTATUS nCE CIII TDO SRAM BE n 0 1 SRAM OE n FLASH SRAM A 0 25 FLASH SRAM DQ 0 15 HSMC CLKIN p 1 2 HSMC CLKIN n 1 2 HSMC CLKOUT0 FLASH WAIT FLASH WAIT LED 0 3 CONF nCONFIG CPU RST n CP
5、U RST n SRAM WE n DDR CLK n DDR RAS n SRAM CLK FLASH CE n SRAM CE1 n DDR CAS n DDR CLK p FLASH ADV n FLASH CLK DDR DM0 DDR DM1 FLASH OE n FLASH RESET n SRAM OE n DDR A 0 12 DDR DQ 0 15 DDR DQS0 DDR CKE DDR DQS1 DDR CS n DDR WE n DDR BA0 FLASH WE n SRAM BE n 0 1 DDR BA1 FLASH SRAM A 0 25 FLASH SRAM D
6、Q 0 15 FLASH WAIT 11 FLASH SchDoc 10 SSRAM SchDoc 09 SDRAM SchDoc 12 TPS54386PWP SchDoc 50MHZ HSMC TX n 4 16 HSMC D 0 34 HSMC RX p 4 16 HSMC CLKIN n 1 2 HSMC CLKIN p 1 2 HSMC CLKOUT n 1 2 HSMC CLKOUT p 1 2 HSMC RX n 4 16 LED 0 3 HSMC TX p 4 16 CLKOUT0 CONF nCONFIG CPU RST n FLASH SRAM DQ 0 15 FLASH
7、SRAM A 0 22 CLKOUT1 clk0 clk1 clk2 clk3 clk8 clk9 clk10 13 HSMC SchDoc 08 LED 07 CLOCK SchDoc JTAG TDI JTAG TMS JTAG TDO CONF JTAG TCK CONF DONE nCE nSTATUS FLASH CE n USB BLASTER06 USB BLASTER SchDoc LED 0 3 SRAM WE n DDR CLK n HSMC TX n 4 16 HSMC D 0 34 DDR RAS n SRAM CLK FLASH CE n SRAM CE1 n DDR
8、 CAS n DDR CLK p FLASH ADV n FLASH CLK DDR DM0 DDR DM1 FLASH OE n HSMC RX p 4 16 FLASH RESET n SRAM OE n DDR A 0 12 DDR DQ 0 15 HSMC CLKOUT n 1 2 DDR DQS0 DDR CKE HSMC CLKOUT p 1 2 DDR DQS1 HSMC RX n 4 16 DDR CS n DDR WE n HSMC TX p 4 16 DDR BA0 FLASH WE n SRAM BE n 0 1 DDR BA1 CIII TDI CIII TDO nCE
9、 CONF DONE nSTATUS CIII TMS CIII TCK nCONFIG 50MHz FLASH SRAM A 0 25 FLASH SRAM DQ 0 15 HSMC CLKIN p 1 2 HSMC CLKIN n 1 2 HSMC CLKOUT0 FLASH WAIT CPU RST n HSMC CLKOUT1 clk0 clk1 clk2 clk3 clk8 clk9 clk10 05 POWER 04 BANK7 03 BANK5 02 BANK3 01 BANK1 BANK2 SchDoc FLASH SRAM DQ 0 15 FLASH SRAM A 0 22
10、HSMC CLKOUT1 HSMC CLKOUT1 clk0 clk1 clk2 clk3 clk8 clk9 clk10 clk0 clk1 clk2 clk3 clk8 clk9 clk10 1 1 2 2 3 3 4 4 5 5 6 6 DD CC BB AA Title SizeDocument NumberRev Date Sheetof EP2C35 BANK1 I O 2 5V and BANK 2 I O 2 5V 1 2 Altera Cyclone III Eval Board A 417 HSMC RX p5 HSMC RX n4 HSMC TX n5 HSMC TX p
11、5 HSMC TX p4 HSMC D1 HSMC TX p8 HSMC TX n15 HSMC RX n6 HSMC RX n9 HSMC TX p9 HSMC RX p7 HSMC RX p8 HSMC RX p9 HSMC RX n7 HSMC RX n8 HSMC TX n7 HSMC TX p7 HSMC RX p6 HSMC TX n6 HSMC TX p6 HSMC D5 HSMC D7 HSMC D3 HSMC TX p15 HSMC TX n9 HSMC TX n8 HSMC RX n5 FLASH SRAM DQ1 HSMC RX p4 HSMC TX n4HSMC D0
12、HSMC D2 HSMC D4 BANK 2 LVDSL 9P DQ3L0 L2 LVDSL 9N DQ3L1 L1 LVDSL 7P DQ1L6 K2 LVDSL 7N DQ1L7 K1 LVDSL 8P DQ1L8 K5 LVDSL 10P DQ3L2 L4 LVDSL 10N DQ3L3 L3 LVDSL 12P DQ3L4 P2 LVDSL 12N DQ3L5 P1 LVDSL 13P DQ3L6 R2 LVDSL 14P DQ3L7 T3 LVDSL 14N DQ3L8 R3 LVDSL 8N DM1L L5 LVDSL 15N DM3L R4 LVDSL 11P DQS1L M2
13、DQS3L M5 LVDSL 11N M1 LVDSL 15P R5 LVDSL 13N R1 IO2 0 L6 IO RDN1 T1 IO RUP1 T2 CLK3 LVDSCLK1n N1 CLK2 LVDSCLK1p N2 IO VREF0B2 M3 U1B EP3C25F324 BANK 1 LVDSL 1P DQ1L0 B2 LVDSL 2N DQ1L1 C1 LVDSL 3P DQ1L2 D2 LVDSL 4N DQ1L3 E1 LVDSL 5P DQ1L4 G2 LVDSL 5N DQ1L5 G1 DQS2L D3 LVDSL 6P DQS0L H2 LVDSL 1N B1 LV
14、DSL 2P C2 LVDSL 3N DATA1 D1 LVDSL 6N H1 IO nRESET C3 IO1 0 H6 CLK1 LVDSCLK0n F1 CLK0 LVDSCLK0p F2 IO VREF0B1 F3 LVDSL 4P FLASH nCE E2 U1A EP3C25F324 FLASH SRAM DQ 0 15 HSMC D 0 34 HSMC RX p 4 16 HSMC RX n 4 16 HSMC TX p 4 16 HSMC TX n 4 16 FLASH RESET n FLASH CE n HSMC TX p 4 16 HSMC TX n 4 16 HSMC
15、RX p 4 16 HSMC RX n 4 16 FLASH SRAM DQ 0 15 HSMC D 0 34 HSMC D32 clk1 clk0 clk3 clk2 R10 50MHz clk0 clk1 clk2 clk3 HSMC D33 HSMC D34 PIR101PIR102COR1 PIU10A1 PIU10A2 PIU10A3 PIU10A4 PIU10A5 PIU10A6 PIU10A7 PIU10A8 PIU10A9PIU10A10 PIU10A11 PIU10A12 PIU10A13 PIU10A14 PIU10A15 PIU10A16 PIU10A17 PIU10A1
16、8 PIU10B1 PIU10B2 PIU10B3 PIU10B4 PIU10B5 PIU10B6 PIU10B7 PIU10B8 PIU10B9PIU10B10 PIU10B11 PIU10B12 PIU10B13 PIU10B14 PIU10B15 PIU10B16 PIU10B17 PIU10B18 PIU10C1 PIU10C2 PIU10C3 PIU10C4 PIU10C5 PIU10C6 PIU10C7 PIU10C8 PIU10C9 PIU10C10 PIU10C11 PIU10C12 PIU10C13 PIU10C14 PIU10C15 PIU10C16PIU10C17 PIU10C18 PIU10D1 PIU10D2 PIU10D3 PIU10D4 PIU10D5 PIU10D6 PIU10D7 PIU10D8 PIU10D9 PIU10D10 PIU10D11 PIU10D12 PIU10D13 PIU10D14 PIU10D15 PIU10D16 PIU10D17 PIU10D18 PIU10E1 PIU10E2 PIU10E3 PIU10E4PIU10E5 PI
