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1、标题：DM9000单片机驱动代码2010-09-12 10:16:07/*dm9000.c writer zxw 2010.3.26*/#includedm9000.h#include def.h#include ARP.h/*/*函数宏定义*/#define XIO_In16(InputPtr) (*(volatile unsigned int*)(InputPtr)#define XIO_In8(InputPtr) (*(volatile unsigned char*)(InputPtr)#define XIO_In32(InputPtr) (*(volatile unsigned lon
2、g*)(InputPtr)#define XIO_Out16(OutputPtr,Value) (*(volatile unsigned int *)(OutputPtr)=(Value)#define DM_ADD (*(volatile U16*)0x20000300)#define DM_CMD (*(volatile U16*)0x20000304)/*/*函数申明*/unsigned int ior(unsigned long BaseAddress,unsigned int reg);unsigned int Dm9000_Read(unsigned long BaseAddres
3、s,int type);void Dm9000_Write(unsigned long BaseAddress,int type,unsigned int Value);void iow(unsigned long BaseAddress,unsigned int reg,unsigned int data);void delay(unsigned int t);void Dm9000_reset(void);void clear_interrupts(void);void phy_write(unsigned long BaseAddress,unsigned int reg,unsigne
4、d int value);void Dm9000_init(unsigned long BaseAddress);void TransmitPacket(unsigned char *data_ptr,unsigned short tx_len);unsigned char ReceivePacket(unsigned char *data_ptr);/*定义接受数组和发送数组*/unsigned char data_ptrRMAX_PACKET_SIZE;/unsigned char data_ptrTMAX_PACKET_SIZE;unsigned char ether_addr06=8,
5、90,90,90,90,90;/unsigned char ether_addr16=8,90,90,90,90,90;/*函数实体*/void dm9000_reg_write(U8 reg, U8 data)delay(1000);/之前定义的微妙级延时函数，这里延时20usDM_ADD = reg;/将寄存器地址写到INDEX端口delay(1000);DM_CMD = data;/将数据写到DATA端口，即写进寄存器/*/U8 dm9000_reg_read(U8 reg)delay(1000);DM_ADD = reg;delay(1000);return DM_CMD;/将数据从寄
6、存器中读出unsigned int ior(unsigned long BaseAddress,unsigned int reg) delay(100);Dm9000_Write(BaseAddress,IO_addr,reg); delay(100);return Dm9000_Read(BaseAddress,IO_data);unsigned int Dm9000_Read(unsigned long BaseAddress,int type)return XIO_In16(BaseAddress+type);void iow(unsigned long BaseAddress,unsi
7、gned int reg,unsigned int data)delay(100);Dm9000_Write(BaseAddress,IO_addr,reg);delay(100);Dm9000_Write(BaseAddress,IO_data,data);void Dm9000_Write(unsigned long BaseAddress,int type,unsigned int value)XIO_Out16(BaseAddress+type,value);void Dm9000_reset(void)iow(BaseAddress1,DM9000_NCR,0x03);delay(1
8、00);iow(BaseAddress1,DM9000_NCR,0x00);iow(BaseAddress1,DM9000_NCR,0x03);delay(100);iow(BaseAddress1,DM9000_NCR,0x00);void delay(unsigned int t)while(t-);void clear_interrupts(void)iow(BaseAddress1,DM9000_IMR,0x80);void phy_write(unsigned long BaseAddress,unsigned int reg,unsigned int value)/*set phy
9、 register address into EPAR REG.0CH*/iow(BaseAddress,0x0c,reg|0x40);/*phy register address setting,and Dm9000_phy 0ffset=0x40*/*fill phy write data into EPDR REG.0xEH®.0DH*/*phy data hign_byte*/iow(BaseAddress,0x0E,(value8)&0xff);/*phy data low_byte*/iow(BaseAddress,0x0D,value&0xff);/*issue phy+w
10、rite commmand=0x0a into EPCR REG.0BH*/*clear phy commmand first*/iow(BaseAddress,0x0B,0x08);/*issue phy+write command*/Dm9000_Write(BaseAddress,IO_data,0x0A);delay(25);/*clear phy command again*/Dm9000_Write(BaseAddress,IO_data,0x08);/*wait 130us(20us)for phy+write completion*/delay(25);/*DM9000初始化*
11、/void Dm9000_init(unsigned long BaseAddress)/*initialize Dm9000 LAN chip*/unsigned int i;/*set the internal phy power_on(GPIOs normal setting)*/iow(BaseAddress,0x1E,0x01);iow(BaseAddress,DM9000_GPCR,0x01);delay(100);/*GPCR REG.1E=1 selected GPIO0output port for internal phy*/ iow(BaseAddress,0x1F,0x
12、00);iow(BaseAddress,DM9000_GPR,0x00);delay(100);/*GPR REG.1F GPIO0 Bit0=0 to active interal phy*/*wait 2ms for phy powner_up ready*/*software-reset */Dm9000_reset();delay(100);/*set GPIO0=1 then GPIO=0 to turn off and on the internal phy*/*GPR Bit0=1 turn-off phy*/ iow(BaseAddress,0x1f,0x01);/*GPR B
13、it0=0 to active phy*/ iow(BaseAddress,0x1f,0x00);/*wait 4ms for phy powner-up*/ delay(10000);/*set phy operation mode*/*reset phy:registers back to the default states */ phy_write(BaseAddress,0,phy_reset);/*wait30us for phy software-reset ok*/ delay(350);/*turn off phy reduce -powner-down mode only*/ phy_write(BaseAddress,16,0x404);/ phy_write(BaseAddress,4,phy_txab);/*set phy
