TEA2025功放(中文资料)

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1、TEA2025B TEA2025D STEREO AUDIO AMPLIFIER DUAL OR BRIDGE CONNECTION MODES FEW EXTERNAL COMPONENTS SUPPLY VOLTAGE DOWN TO 3V HIGH CHANNEL SEPARATION VERY LOW SWITCH ON OFF NOISE MAX GAIN OF 45dB WITH ADJUST EXTER NAL RESISTOR SOFT CLIPPING THERMAL PROTECTION 3V VCC 15V P 2 1W VCC 6V RL 4 P 2 2 3W VCC

2、9V RL 4 P 2 0 1W VCC 3V RL 4 DESCRIPTION The TEA2025B D is a monolithic integrated circuit in 12 2 2 Powerdip and 12 4 4 SO intended for use as dual or bridge power audio amplifier port able radio cassette players September 2003 SymbolParameterTest ConditionsUnit VS Supply Voltage 15V IOOuput Peak C

3、urrent1 5A TJ Junction Temperature150 C Tstg Storage Temperature150 C ABSOLUTE MAXIMUM RATINGS DECOUPLING 11 2 2 THERMAL PROTECT START CIRCUIT 10K 10K 50 50 5K 50 SVR IN 2 FEEDGNDGNDBOOT 2OUT 2 BRIDGE VS OUT 1BOOT 1GNDGNDFEEDIN 1 GND Sub D94AU120 BLOCK DIAGRAM POWERDIP 12 2 2 SO20 12 4 4 ORDERING NU

4、MBERS TEA2025B PDIP TEA2025D SO 1 9 BRIDGE OUT 2 BOOT 2 GND GND FEEDBACK IN 2 SVR Vs OUT 1 BOOT 1 GND GND FEEDBACK IN 1 GND sub 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 POWERDIP 12 2 2 PIN CONNECTION Top view BRIDGE OUT 2 BOOT 2 GND GND GND GND FEEDBACK IN 2 1 3 2 4 5 6 7 8 9IN 1 FEEDBACK GND GND GND

5、GND BOOT 1 OUT 1 VCC20 19 18 17 16 14 15 13 12 D94AU119 SVR10GND Sub 11 SO 12 4 4 PIN CONNECTION Top view SymbolDescriptionSO 12 4 4 PDIP 12 2 2 Unit Rth j case Rth j amb Thermal Resistance Junction case Thermal Resistance Junction ambient Max Max 15 65 15 60 C W C W The Rth j amb is measured with 4

6、sq cm copper area heatsink The Rth j amb is measured on devices bonded on a 10 x 5 x 0 15cm glass epoxy substrate with a 35 m thick copper surface of 5 cm2 THERMAL DATA TEA2025B TEA2025D 2 9 ELECTRICAL CHARACTERISTICS Tamb 25 C VCC 9V Stereo unless otherwise specified SymbolParameterTest ConditionsM

7、in Typ Max Unit VSSupply Voltage312V IQQuiescent Current3550mA VOQuiescent Output Voltage4 5V AVVoltage Gain Stereo Bridge 43 49 45 51 47 53 dB AVVoltage Gain Difference 1dB RjInput Impedance30K PO Output Power d 10 Stereo 8 per channel 9V 9V 6V 6V 6V 6V 3V 3V 12V 4 8 4 8 16 32 4 32 8 1 7 0 7 2 3 1

8、3 1 0 6 0 25 0 13 0 1 0 02 2 4 W Bridge 9V 6V 6V 3V 3V 8 4 8 16 32 4 7 2 8 1 5 0 18 0 06 W dDistortionVs 9V RL 4 Stereo Bridge 0 3 0 5 1 5 SVRSupply Voltage Rejectionf 100Hz VR 0 5V Rg 0 40 46dB EN IN Input Noise Voltage RG 0 RG 10 4 1 5 3 3 6 mV CTCross Talkf 1KHz Rg 10K 40 52dB Term N PDIP 1234567

9、8910111213141516 DC VOLT V 0 044 58 9000 60 048 500 040 6008 94 59 Figure 1 Bridge Application Powerdip Figure 2 Stereo Application Powerdip C6 C4 C8 C5 C7 C9 C2 C11 C3 C1 C10 TEA2025B TEA2025D 3 9 10 20 30 40 50 3691215 I mA Vs V STEREO Figure 3 Supply Current vs Supply Voltage RL 4 0 0 5 1 1 5 2 2

10、 5 3 3 5 3691215 Po W Vs V STEREO Rl 4ohmRl 8ohm Rl 16ohm Figure 5 Output Power vs Supply Voltage THD 10 f 1KHz 0 1 1 10 00 20 40 60 81 THD Po W STEREO Rl 4 OHM Rl 16ohm Rl 8ohm Figure 6 THD versus Output Power f 1KHz VS 6V 0 1 2 3 4 5 6 7 8 3691215 Vo V Vs V Vs V STEREO Figure 4 Output Voltage vs S

11、upply Voltage TEA2025B TEA2025D 4 9 APPLICATION INFORMATION Input Capacitor Input capacitor is PNP type allowing source to be referenced to ground In this way no input coupling capacitor is required However a series capacitor 0 22 uF to the input side can be useful in case of noise due to variable r

12、esistor contact Bootstrap The bootstrap connection allows to increase the output swing The suggested value for the bootstrap capacitors 100uF avoids a reduction of the output signal also at low frequencies and low supply voltages Voltage Gain Adjust STEREO MODE The voltage gain is determined by on c

13、hip resis tors R1 and R2 together with the external RfC1 series connected between pin 6 11 and ground The frequency response is given approximated by VOUT VIN R1 Rf R2 1 JWC1 With Rf 0 C1 100 uF the gain results 46 dB with pole at f 32 Hz THE purpose of Rf is to reduce the gain It is rec ommended to

14、 not reduce it under 36 dB BRIDGE MODE The bridge configuration is realized very easily thanks to an internal voltage divider which pro vides at pin 1 the CH 1 output signal after reduc tion It is enough to connect pin 6 inverting input of CH 2 with a capacitor to pin 1 and to connect to ground the

15、pin 7 The total gain of the bridge is given by VOUT VIN R1 Rf R2 1 JWC1 1 R3 R4 R1 R2 R4 1 JWC1 and with the suggested values C1 C2 100 F Rf 0 means Gv 52 dB with first pole at f 32 Hz Output Capacitors The low cut off frequency due to output capacitor depending on the load is given by FL 1 2 COUT R

16、L with COUT 470 F and RL 4 ohm it means FL 80 Hz Pop Noise Most amplifiers similar to TEA 2025B need exter nal resistors between DC outputs and ground in order to optimize the pop on off performance and crossover distortion The TEA 2025B solution allows to save compo nents because of such resistors 800 ohm are in cluded into the chip Figure 7 Figure 8 Figure 9 TEA2025B TEA2025D 5 9 Stability A good layout is recommended in order to avoid oscillations Generally the designer must pay attention on

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