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1、null nulll: 2010- 11null nullTe:;(1977null ),3,=,VYd95#qbM_=Q汤null 胜(武汉供电公司变电检修公司,湖北 武汉 430050)null nullK1: 文章给出了二次回路优化改进方案b通过改变现有回路信号传输方式,以嵌入式以太网芯片 MC9S12NE64为核心构成一个完整的终端节点,形成数字信号传输网络,取代传统的导线连接回路b使连接端子箱到保护屏a测控屏及其他保屏大量线缆用光纤(或网线)代替,端子箱成为信号采集点b设备之间的连接全部采用高速的网络通信b介绍了以太网芯片 MC9S12NE64的主要特点a内部结构和操作模式,给出了优
2、化后的回路结构组成a测控装置结构a信号采集电路及相关的软件设计b1oM: 嵌入式系统;以太网;二次回路监测;MC9S12NE64ms|: TP273null null null null null null null nullDSM: Bnull null null null null null null nullcI|: 1006- 2394( 2011) 03- 0018- 04Research on Optimization ofTransformernulls SecondaryCircuitTANG Sheng(Wuhan Substatian Exam ine and Repair
3、Company, Wuhan 430050, China)Abstract: The improvement and optimization of the secondary circuit are introduced. The transmission way of theloop signal is changed. It takes embedded Ethernet chipMC9S12NE64 as the core to form a digital signal transm issionnetwork and takes the placeof traditionalw i
4、re loop. The opticalfiber is used to substitute themeshw irewhich connectsthe terminalbox to theprotecting panels, theobservation panels, and otherpanels. The terminalbox becomes the signalcollecting spo.t The equipment communicatesw ith each others through the high speed network. Themain features o
5、f theEthernet chipMC9S12NE64 are introduced, about the internal structure, the operatingmode, the optim ized loop struc-ture, the equipmentnulls structure, the signalcollecting circuit and the design of related software.Key words: embedded system; Etherne;t secondary circuitmonitoring; MC9S12NE640nu
6、ll=Q(=Q)eaUaSBQ,eda|daSda?1db=QaFa?aqa,T# ?%BQZT,iBQSebtqPaleBQav,BQdeaa9aSjbBQd?3#pH,=QedadSMQ,M#p!,HYM)bM_=Qv?# ,t!1,Lv,#pq;HHLB3M,7OC#ps_bM_T=Q#pdv1,H#p,sb1nulld98!9!a0Q#bWs,|subuBe3u=a71#M1ebeLH|u,YVg?ae#b=Qdmm1Ub图 1null 二次回路信号采集系统框图null18nullNV/null null 2011M3eBY?=Q8e,u=Q:cbdVe,iOYV.ae#bae#?le
7、?V,VYVe/r7bl,=Q,#MebeHCSl2CPU=16MC9S12NE64,aEa71vazeaoAUsF,m2Ub图 2null 测控装置结构框图2nulldqv2. 1null MC9S12NE64+#?MC9S12NE64HCSl2CPU=16,VZLLCqz,BbMC9S12NE64=?vmm3UbkvHCS12CPU2xSCISPI IICV3. 3 2. 5VI8o#IRQgADC 10a8YH16a4Y=9L64Ki8KRAMEPHYEMAC图 3null MC9S12NE64的内部结构null null MC9S12NE64?16HCSl2CPU=, 3.3V/TqV
8、r25MHz10M IPS,C8,V3Esebkg,VLHL_kb64KBNash=i8KBRAM,?vb10/100Mbit/se( EMAC),=Sg(M II),VLCMY#Vr,8KB RAMVEMACu,B?ulubMC9S12NE64RAM2CPU,PCPUEMACuVi|b10/100Mbit/s( EPHY ),1xT,i1?bMC9S12NE64eIEEE 802. 3Sa802.3/802. 3ua802. 3xSB,8g(M II)VT10Mbit/s, 10Mbit/s,100Mbit/s,100Mbit/s,VLCexpebMC9S12NE64qm4Ub图 4null MC9S12NE64以太网连接的硬件电路原理null19null2011M3null nullNV/2. 2null71v=Q,71v:B!(1?(,_t!T(7);6B?e&Bt(,?(M71bYV717,TQ!T,t71eFbv|71,eMotorolaMC33993g,Z71b71MC33993KVS22(|,14%|( sw itchnull tonullground); 8VI|( sw itchnulltonull ground or tonull battery)bS1!g( SPI), NE64V1Y
