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1、10/16/20122012 Illinois Institute of Technology ECE 587 Hardware/Software Co-Design Lecture 16 Software Synthesis I Professor Jia Wang Department of Electrical and Computer Engineering Illinois Institute of Technology October 16, 2012 ECE 587 Hardware/Software Co-DesignFall 20121/20 Project II ?Due
2、Date: 10:00am 11/30 Chicago time ?Bonus: see project instruction for details ? Prepare a proposal describing what you want to do and email it to me on or before 10:00am 10/26 Chicago time for approval ? Team work is encouraged! ? Report due 10:00am 12/07 Chicago time ECE 587 Hardware/Software Co-Des
3、ignFall 20122/20 Reading Assignment ?This lecture: 5.1, 5.2, 5.3 ?Next lecture: 5.4 ECE 587 Hardware/Software Co-DesignFall 20123/20 Outline Software Synthesis Code Generation ECE 587 Hardware/Software Co-DesignFall 20124/20 Synthesis Overview (Gajski et al.) ?Software synthesis: generate binary cod
4、e for target platform ECE 587 Hardware/Software Co-DesignFall 20125/20 Embedded Software Design ?Software development dominates the design cost of modern complex multiprocessor systems. ?Complexity of embedded software increases. ? Overall system complexity increases. ? Designers prefer software-cen
5、tric implementations because of productivity and fl exibility. ?Automated software synthesis is preferred. ? Especially for software that is tightly coupled to the underlying hardware. ECE 587 Hardware/Software Co-DesignFall 20126/20 Automated Software Synthesis ?Generate embedded software from syst
6、em TLM ? The fi nal products are the binaries for processors. ? Benefi ts ? No tedious and error-prone manual code writing ? Demands less processor- and platform-specifi c knowledge from the designer ? Each synthesis step can be individually verifi ed. ?Increase productivity by reducing time for dev
7、elopment and debugging ECE 587 Hardware/Software Co-DesignFall 20127/20 Challenges for Software Development/Synthesis ?Coupling to underlying hardware and external processes ? Embedded software interacts with hardware accelerators. ? Embedded software interacts with external physical process. ?Timel
8、iness ? Real-time constraints extend to software implementation ? Correctness not only means correct functionality, but also the ability to meet deadlines. ? Predictable execution time is more important than fast execution. ?Concurrency ? Scheduling with real-time constraints is complicated. ?Resour
9、ce constraints ? Memory, computing power, energy consumption, power dissipation, etc. ECE 587 Hardware/Software Co-DesignFall 20128/20 Software Synthesis and Programming Languages ?Software synthesis leverages existing embedded software design tools. ?Embedded software can be generated in existing p
10、rogramming language(s) ? Instead of binaries, which can be produced by existing tools ? Allow designers to have better control over the fi nal code ?What languages are available? ?Which one are we going to use? ECE 587 Hardware/Software Co-DesignFall 20129/20 Programming Languages ? Assembly: provid
11、e fi ne-grained control over processors ? Processor dependent and overly verbose for large projects ?C: provide low-level features while being ? Processor independent, require minimal run-time support ?C+: compatible with C, provide higher level abstractions ? Complicated, large runtime overhead if
12、not used properly ? Java: a simplifi ed derivative of C+ ? Prevent unnecessary mistakes (both functional and performance-wise) by being less fl exible ? JVM provides supports of concurrency and communications at language level, though slow speed is a concern. ? To meet deadlines is challenging due t
13、o garbage collection. ECE 587 Hardware/Software Co-DesignFall 201210/20 Software Synthesis Flow (Gajski et al.) ECE 587 Hardware/Software Co-DesignFall 201211/20 Example Input TLM (Gajski et al.) ?How about to implement the TLM via running the necessary simulation kernels on target processors? ? Con
14、sume too much resource and lead to slow execution ECE 587 Hardware/Software Co-DesignFall 201212/20 Example Input TLM (Gajski et al.) ?How about to implement the TLM via running the necessary simulation kernels on target processors? ? Consume too much resource and lead to slow execution ECE 587 Hard
15、ware/Software Co-DesignFall 201212/20 Outline Software Synthesis Code Generation ECE 587 Hardware/Software Co-DesignFall 201213/20 Code Generation ? Input: a single task specifi ed in certain system design language, e.g. SystemC ?Output: a sequential program in a programing language that will be com
16、piled to binaries later, e.g. C ?A task is inherently sequential. ? The focus is therefore to translate module compositions and communications into available language constructs. ?Use data abstractions to represent modules, ports, and their compositions ?Communications ? Use function call and global variables to resolve communications within the same task. ? Use inter-process communication primitives to resolve communications among tasks on the same processor ? U
