闪存gd25q64c_rev10

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1、 3.3V Uniform Sector Dual and Quad Serial Flash 北京芯联科泰电子有限公司 GD25Q64C DATASHEET 1 GD25Q64C 3.3V Uniform Sector Dual and Quad Serial Flash Contents GD25Q64C 1. 2. 3. 4. 5. 6. 7. FEATURES 4 GENERAL DESCRIPTION 5 MEMORY ORGANIZATION 7 DEVICE OPERATION 8 DATA PROTECTION 9 STATUS REGISTER. 11 COMMANDS DE

2、SCRIPTION . 13 7.1. 7.2. 7.3. 7.4. 7.5. 7.6. 7.7. 7.8. 7.9. 7.10. 7.11. 7.12. 7.13. 7.14. 7.15. 7.16. 7.17. 7.18. 7.19. 7.20. 7.21. 7.22. 7.23. 7.24. 7.25. 7.26. 7.27. 7.28. 7.29. 7.30. 7.31. WRITE ENABLE (WREN) (06H) . 16 WRITE DISABLE (WRDI) (04H) . 16 WRITE ENABLE FOR VOLATILE STATUS REGISTER (50

3、H) 16 READ STATUS REGISTER (RDSR) (05H OR 35H OR 15H) 17 WRITE STATUS REGISTER (WRSR) (01H OR 31H OR 11H) 17 READ DATA BYTES (READ) (03H) 18 READ DATA BYTES AT HIGHER SPEED (FAST READ) (0BH) 18 DUAL OUTPUT FAST READ (3BH) 19 QUAD OUTPUT FAST READ (6BH) . 19 DUAL I/O FAST READ (BBH) . 20 QUAD I/O FAS

4、T READ (EBH) . 22 QUAD I/O WORD FAST READ (E7H) 23 SET BURST WITH WRAP (77H) . 24 PAGE PROGRAM (PP) (02H) . 25 QUAD PAGE PROGRAM (32H). 26 FAST PAGE PROGRAM (FPP) (F2H) 27 SECTOR ERASE (SE) (20H). 28 32KB BLOCK ERASE (BE) (52H) . 28 64KB BLOCK ERASE (BE) (D8H) 29 CHIP ERASE (CE) (60/C7H) . 30 DEEP P

5、OWER-DOWN (DP) (B9H) . 30 RELEASE FROM DEEP POWER-DOWN OR HIGH PERFORMANCE MODE AND READ DEVICE ID (RDI) (ABH) 31 READ MANUFACTURE ID/ DEVICE ID (REMS) (90H) 32 DUAL I/O READ MANUFACTURE ID/ DEVICE ID (92H) 33 QUAD I/O READ MANUFACTURE ID/ DEVICE ID (94H) . 34 READ IDENTIFICATION (RDID) (9FH) 34 HIG

6、H PERFORMANCE MODE (HPM) (A3H) 35 PROGRAM/ERASE SUSPEND (PES) (75H) . 35 PROGRAM/ERASE RESUME (PER) (7AH) . 36 ERASE SECURITY REGISTERS (44H) . 37 PROGRAM SECURITY REGISTERS (42H) 37 2 3.3V Uniform Sector Dual and Quad Serial Flash GD25Q64C 7.32. 7.33. 7.34. READ SECURITY REGISTERS (48H). 38 ENABLE

7、RESET (66H) AND RESET (99H) 39 READ SERIAL FLASH DISCOVERABLE PARAMETER (5AH) . 39 8. ELECTRICAL CHARACTERISTICS . 44 8.1. 8.2. 8.3. 8.4. 8.5. 8.6. 8.7. 8.8. POWER-ON TIMING . 44 INITIAL DELIVERY STATE. 44 DATA RETENTION AND ENDURANCE 44 LATCH UP CHARACTERISTICS . 44 ABSOLUTE MAXIMUM RATINGS . 45 CA

8、PACITANCE MEASUREMENT CONDITIONS . 45 DC CHARACTERISTICS. 46 AC CHARACTERISTICS. 47 9. 10. ORDERING INFORMATION . 50 PACKAGE INFORMATION . 51 10.1. 10.2. 10.3. 10.4. 10.5. 11. PACKAGE SOP8 208MIL . 51 PACKAGE DIP8 300MIL 52 PACKAGE WSON 8 (6*5MM) . 53 PACKAGE TFBGA-24BALL (6*4 BALL ARRAY) 54 PACKAGE

9、 SOP16 300MIL 55 REVISION HISTORY 56 3 Advanced Security Features 3.3V Uniform Sector Dual and Quad Serial Flash 1. FEATURES GD25Q64C 64M-bit Serial Flash Program/Erase Speed -8192K-byte -256 bytes per programmable page -Page Program time: 0.6ms typical -Sector Erase time: 50ms typical -Block Erase

10、time: 0.15/0.20s typical Standard, Dual, Quad SPI -Standard SPI: SCLK, CS#, SI, SO, WP#, HOLD# -Chip Erase time: 25s typical -Dual SPI: SCLK, CS#, IO0, IO1, WP#, HOLD# Flexible Architecture -Quad SPI: SCLK, CS#, IO0, IO1, IO2, IO3 -Sector of 4K-byte -Block of 32/64k-byte Low Power Consumption High S

11、peed Clock Frequency -120MHz for fast read with 30PF load -Dual I/O Data transfer up to 240Mbits/s -20mA maximum active current -5uA maximum power down current -Quad I/O Data transfer up to 480Mbits/s -Continuous Read With 8/16/32/64-byte Wrap (1) -3*1024-Byte Security Registers With OTP Locks -Disc

12、overable parameters(SFDP) register Software/Hardware Write Protection Single Power Supply Voltage -Write protect all/portion of memory via software -Enable/Disable protection with WP# Pin -Full voltage range:2.73.6V -Top or Bottom, Sector or Block selection Package Information -SOP8 (208mil) -DIP8 (

13、300mil) Cycling endurance -WSON8 (6*5mm) -Minimum 100,000 Program/Erase Cycles -TFBGA-24(6*4 ball array) -SOP16 (300mil) Data retention -20-year data retention typical Note: 1.Please contact GigaDevice for details. 4 Pin Name I/O Description CS# I Chip Select Input SO (IO1) I/O Data Output (Data Inp

14、ut Output 1) WP# (IO2) I/O Write Protect Input (Data Input Output 2) VSS Ground SI (IO0) I/O Data Input (Data Input Output 0) SCLK I Serial Clock Input HOLD# (IO3) I/O Hold Input (Data Input Output 3) VCC Power Supply 3.3V Uniform Sector Dual and Quad Serial Flash GD25Q64C 2. GENERAL DESCRIPTION The

15、 GD25Q64C (64M-bit) Serial flash supports the standard Serial Peripheral Interface (SPI), and supports the Dual/Quad SPI: Serial Clock, Chip Select, Serial Data I/O0 (SI), I/O1 (SO), I/O2 (WP#), and I/O3 (HOLD#). The Dual I/O data is transferred with speed of 240Mbits/s and the Quad I/O Security Reg

16、ister2: A23-A16=00H, A15-A8=20H, A7-A0= Byte Address; Security Register3: A23-A16=00H, A15-A8=30H, A7-A0= Byte Address. 9. Dummy bits and Wrap Bits IO0 = (x, x, x, x, x, x, W4,x) IO1 = (x, x, x, x, x, x, W5, x) IO2 = (x, x, x, x, x, x, W6, x) IO3 = (x, x, x, x, x, x, W7, x) 10. Address, Continuous Read Mode bits, Dummy bits, Manufacture ID and Device ID IO0 = (A20, A16, A12, A8, A4, A0, M4, M0, x, x, x, x, MID4, MID0, DID4, DID0, ) IO1 = (A21, A17, A13, A9, A5, A1, M5,

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